peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 110

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peb3456e

Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
4.9.1.2
Demultiplexer
The demultiplexer extracts four DS1 signals out of each DS2 signal. If two out of three
bits of C
which is assigned to the i
The demultiplexer performs inversion of the 2
Multiplexer
The multiplexer combines four DS1 signals to form a DS2 signal. Stuffing bits are
inserted and the C
in case that not enough data is available.
The 2
4.9.1.3
Detection
Loopback requests encoded in the C-bits of the DS2 signal are flagged when they are
repeated for at least five DS2 multiframes. Loops must be initiated by an external
microprocessor.
Generation
A loopback request, which is transmitted in lieu of the C-bits, can be placed in each DS2
signal.
4.9.1.4
Detection
AIS is declared, when the AIS condition (the received DS2 data stream contains an all
‘1’ signal with less then 3/9 zeros within 3156 bits while the DS2 framer is out of frame)
is present within a time interval that is determined by register D2RAP.
Generation
The alarm indication signal is an all ’1’ unframed signal and will be transmitted if enabled.
Data Sheet
nd
i1
and 4
, C
Multiplexer/Demultiplexer
Loopback Control
Alarm Indication Signal
i2
, C
th
DS1 signal are automatically inverted in transmit direction.
i3
are set to ’1’ the first information bit in the i
i1
-, C
i2
-, C
th
DS1 signal is discarded.
i3
-bits, which are assigned to the i
110
nd
and 4
th
tributary DS1 signal.
th
subframe and the 6
th
Functional Description
DS1 signal, are set to ’1’
PEB 3456 E
05.2001
th
block

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