peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 102

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peb3456e

Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
CRC check
As an option in HDLC mode the internal handling of received and transmitted CRC
checksum can be influenced via control bits RCR1.XCRC and XCR1.DISCRC.
• Receive Direction
• Transmit Direction
The TE3-CHATT does not check whether the length of the frame, i.e. the number of
bytes to be transmitted makes sense or not.
Address comparison
An optional address comparison feature forwards all frames which match a
programmable address to the receive FIFO. Frames not matching the address are
discarded.
If a 2-byte address field is selected, the high address byte is compared with two
individually programmable values defined in register RAH. Similarly, two values can be
programmed in register RAL for the low address byte. A valid address is recognized
when the high byte and the low byte of the address field correspond to one of the
compare values. Thus, the TE3-CHATT can be called (addressed) with 4 different
address combinations.
In case of a 1-byte address, RAL will be used as compare registers. The HDLC control
field, data in the I-field and an additional status byte are temporarily stored in the receive
FIFO.
Preamble Transmission
If enabled, a programmable 8-bit pattern XCR1.PBYTE is transmitted with a selectable
number of repetitions after interframe time-fill transmission is stopped and a new frame
is ready to be sent out.
Zero Bit Insertion is disabled during preamble transmission. To guarantee correct
function the programmed preamble value should be different from Receive Address Byte
values.
Data Sheet
The received CRC checksum is always assumed to be in the last two bytes of a frame,
immediately preceding a closing flag. If RCR1.XCRC is set, the received CRC
checksum will be written to RFIFO where it precedes the frame status byte. The
received CRC checksum is additionally checked for correctness.
If XCR1.DISCRC is set, the CRC checksum is not generated internally. The checksum
has to be provided via the transmit FIFO (XFF.XFIFO) as the last two bytes. The
transmitted frame will only be closed automatically with a (closing) flag.
102
Functional Description
PEB 3456 E
05.2001

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