peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 144
peb3456e
Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456E.pdf
(424 pages)
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AIC
XBIT
IDLES
AISS
REDS
LOSS
FAS
Data Sheet
Received new AIC-Bit
The ‘Received new AIC-Bit’ interrupt vector is generated whenever the
TE3-CHATT detects a change in the AIC overhead bits and when its
state is persistent for at least three multiframes.
Received X-Bit
The ‘Received new X-Bit’ interrupt vector is generated whenever the
TE3-CHATT detects a change in the X overhead bits and when its state
is persistent for at least three multiframes.
DS3 Idle Signal Status
The ‘DS3 Idle Signal Status’ interrupt vector is generated whenever the
TE3-CHATT detects a change of the idle signal. D3RSTAT.IDLES
contains the actual state of the idle state, i.e. active/not active.
DS3 Alarm Indication Signal Status
The ‘DS3 Alarm Indication Signal Status’ is generated whenever the
TE3-CHATT detects a change in the AIS alarm state. D3RSTAT.AISS
shows the actual AIS alarm state, i.e. active/not active.
DS3 Red Alarm Status
The ‘DS3 Red Alarm’ interrupt vector is generated whenever the TE3-
CHATT detects a change in the red alarm state. D3RSTAT.RED shows
the actual red alarm state, i.e. active/not active.
DS3 Input Signal Status
The ‘DS3 Input Signal Status’ interrupt vector is generated whenever the
TE3-CHATT detects a change in the DS3 input signal state, i.e. loss/no
loss. D3RSTAT.LOSS shows the actual state of the DS3 input signal.
DS3 Frame Alignment Status
The ‘DS3 Frame Alignment Status’ interrupt vector is generated
whenever the TE3-CHATT detects a change in the DS3 frame
alignment. D3RSTAT.FAS shows the actual state.
144
Functional Description
PEB 3456 E
05.2001
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