peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 266

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

D3TCFG
DS3 Transmit Configuration Register
Access
Address
Reset Value
FAM
ITCK
ITD
UTD
Data Sheet
15
0
0
0
: read/write
: 188
: 0000
TOVHSYN Mode
This bit switches between input mode and output mode of the signal pin
TOVHSYN. If TOVHSYN is operated in input mode it marks the position
of the X-bit. Therefor the outgoing DS3 frame is aligned to TOVHSYN. If
TOVHSYN is switched to output mode TOVHSYN is asserted when the
X-bit needs to be inserted via the transmit overhead interface.
0
1
Invert Transmit Clock
This bit sets the clock edge for data transmission.
0
1
Invert Transmit Data
This bit enables inversion of transmit data.
0
1
Unipolar data mode
This bit sets the port mode to dual-rail mode or unipolar mode.
0
1
0
H
H
(PCI), 44
TOVHSYN switched to input.
TOVHSYN switched to output.
Update transmit data on the rising edge of transmit clock.
Update transmit data on the falling edge of transmit clock.
Transmit data is logic high (not inverted).
Transmit data is logic low (inverted).
B3ZS (dual rail data)
Unipolar mode (single rail data)
0
0
H
(Local bus)
0
FAM ITCK
8
266
7
ITD
6
UTD AISC
5
4
Register Description
LPC(1:0)
3
2
PEB 3456 E
FPL CBP
1
05.2001
0