peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 175

• Manufacturer Part Number: peb3456e
• Description: Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
• Manufacturer: Infineon Technologies Corporation

8.1.3
This section describes the registers which are located on the configuration bus II (see
also These registers can be accessed either from PCI bus via the internal bus bridge or
from the local bus side.
Note: Since the local bus is 16-bit wide and the PCI bus is 32-bit wide, the upper 16 bit
Note: Please note that read accesses to local bus registers via PCI bus and therefore
Table 8-3
Data Sheet
Register
FCONF
MTIMER
Interrupt control for local bus side
INTCTRL
INTFIFO
DS3 Clock Configuration and Status Register
D3CLKCS
TUCLKC
DS3 Transmit Control Registers
D3TCFG
D3TCOM
D3TLPB
D3TLPC
D3TAIS
D3TFINS
of data coming from/to PCI are discarded.
the internal bus bridge may result in latencies which exceed the 16 clock rule of
PCI specification. Exceeding the 16 clock rule results in target initiated retry on
PCI bus. In this case the read cycle needs to be repeated.
PCI and Local Bus Register Set (Direct Access)
PCI and Local Bus Slave Register Set
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Address
(PCI)
10C
18C
19C
100
104
108
180
184
188
190
194
198
H
H
H
H
H
H
H
H
H
H
H
H
Address
(Local
Bus)
4C
4A
4E
00
00
04
06
40
42
44
46
48
H
H
H
H
H
H
H
H
H
H
H
H
175
FFFF
Reset
8080
0001
0001
0000
0000
0000
0070
0000
0000
0000
0000
value
H
H
H
H
H
H
H
H
H
H
H
H
Configuration Register
Master Local Bus
Timer
Interrupt Control
Interrupt FIFO
DS3 Clock Confi-
guration and Status
Test Unit Clock
Configuration
Transmit Configuration
Transmit Command
Remote DS2
Loopback
Transmit Loopback
Code Insertion
Transmit AIS Insertion
Transmit Fault
Insertion Control
Comment
Register Description
PEB 3456 E
05.2001
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