peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 391

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peb3456e

Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
c) PCI Interface Pins
Table 9-4
9.4
a) Non-PCI interface pins
T
Inputs are driven to 2.4 V for a logical ‘1’ and to 0.4 V for a logical ‘0’. Timing
measurements are made at 2.0 V for a logical ‘1’ and at 0.8 V for a logical ‘0’.
The AC testing input/output waveforms are shown below.
Figure 9-1
b) PCI interface pins
PCI interface pins are measured as pins compliant to the 3.3V signalling environment
according to the PCI Specification Rev. 2.1.
Data Sheet
Parameter
L-input voltage
H-input voltage
L-output voltage
H-output voltage
A
0.45
2.4
= -40 to 85 C, V
AC Characteristics
DC Characteristics (PCI Interface Pins)
T
Input/Output Waveform for AC Tests
2.0
0.8
A
= -40 to 85 C, V
DD3
test points
= 3.3 V
Symbol
V
V
V
V
2.0
0.8
OH
OL
IH
IL
=
0.3 V, V
DD3
= 3.3 V
0.9V
0.5V
min.
-0.5
DD25
Limit Values
391
DD3
DD3
= 2.5 V
=
0.3 V, V
V
0.3V
0.1V
DD3
80mV
max.
DD3
+0.5
DD3
DD25
=
0.25 V, V
Device
Under
Test
-
= 2.5 V
Electrical Characteristics
Unit Test Condition
V
V
V
V
SS
I
I
QL
QH
= 0 V
=
0.25 V, V
= 1500 A
= -500 A
PEB 3456 E
C
load
= 50pF
SS
05.2001
= 0 V

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