dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 75
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
(133 pages)
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NXP Semiconductors
Table 86.
Table 87.
Table 88.
DAC1628D1G25
Objective data sheet
Bit
7
1 to 0
Bit
7 to 5
4 to 3
2 to 0
Bit
4 to 0
Symbol
DLP-STROBE
RESERVED[1:0]
Symbol
L[2:0]
M[1:0]
F[2:0]
Symbol
PAGE[4:0]
MISC_CTRL register (address 1Dh) bit description
LMF_CTRL register (address 1Eh) bit description
PAGE_ADDRESS register (address 1Fh) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 October 2011
Access
R/W
R/W
Access
R/W
R/W
R/W
Access
R/W
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Value
0
1
-
Value
-
-
-
Value
0h
Description
captures the 8-bit data inside the DLP for each lane
(see
reserved
Description
number of lanes [1, 2, 4]
number of converters [1]
number of octets/frame [1, 2, 4]
Description
page_address
no action
update dlp sample
Table 110
DAC1628D1G25
and
Table
116, 0E, 0F and 1E)
© NXP B.V. 2011. All rights reserved.
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