dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 100
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
(133 pages)
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NXP Semiconductors
DAC1628D1G25
Objective data sheet
10.17.7 Page x0A: Main controls
This page specifies the main configuration of the different clocking systems used in the
DAC1628D1G25.
Fig 30. Page x0A: Main controls
PAGE x0A: MAIN CONTROLS
MAN_PON_CTRL
FULL_REINIT
POFF_RX
VIN_P0
VIN_N0
VIN_P1
VIN_N1
VIN_P2
VIN_N2
VIN_P3
VIN_N3
All information provided in this document is subject to legal disclaimers.
AUTO_QUICK_EN
L0
L1
L2
L3
AUTO_CAL_EQ
AUTO_CAL_RT
FORCE_RST_WCLK
RST_EXT_WCLK_TIME
RX IP
Rev. 1.1 — 10 October 2011
Eq
Eq
Eq
Eq
(see page x01)
DLP
WCLK
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
NO_DCLK_REINIT
AUTO_LOCK_DET_EN
SR_CDI
FORCE_LOCK_DET
LOCK DETECTOR
CDI_MODE
^2 mode
^4 mode
^8 mode
CDI
(see page x01)
FORCE_RST_DCLK
RST_EXT_DCLK_TIME
DCLK
(see page x00)
MON_DCLK_STOP
MON_DCLK
INTERFACE
DAC DSP
DAC1628D1G25
I_DC_LVL
Q_DC_LVL
IO_SEL_2
IO_SEL_0
IO_SEL_1
I_LVL_CTRL
Q_LVL_CTRL
IO0
IO0
© NXP B.V. 2011. All rights reserved.
IO0_EN
IO1_EN
DAC B
DAC A
aaa-000289
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