dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 56

• Manufacturer Part Number: dac1628d1g25
• Description: Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 46.
Default values are shown highlighted.
Table 47.
Default values are shown highlighted.
Table 48.
Default values are shown highlighted.
DAC1628D1G25
Objective data sheet
Bit
4
3 to 2
Bit
3
2
1
0
Bit
7
6
5
4
Symbol
MDS_DAISY_KEEP_SREF
I_REINIT_MODE[1:0]
Symbol
MDS_SEL_FE_E
MDS_SEL_RT_E
MDS_SEL_FE_W
MDS_SEL_RT_W
Symbol
MDS_RUN
MDS_NCO
MDS_NCO_PULSE
MDS_EVAL_EN
MDS_VS1_CTRL register (address 01h) bit description
MDS_IO_CTRL register (address 02h) bit description
MDS_MISC_CTRL0 register (address 03h) bit description
Access
R/W
R/W
Access
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 October 2011
Value
0
1
00
01
10
11
Value
0
1
0
1
0
1
0
1
Value
0
1
0
1
0
1
0
1
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Description
controls the SREF signal generation in daisy chain
mode, for easy resynchronization
Description
MDS east falling edge/rising edge operation
MDS east internal resistor termination activation
MDS west falling edge/rising edge operation
Description
starts the MDS module
NCO synchronization
NCO tuning manual control
MDS evaluation
reinitialization mode
MDS west internal resistor termination activation
…continued
daisy control timer switches sref off
sref used for daisy chain remains active
assert synchronization request
assert synchronization request and reset DLP
assert synchronization request and reset MDS
controller
no action (ignore dlp_issue)
falling edge
rising edge
inactive
active
falling edge
rising edge
inactive
active
no action
(0  1) transition restarts evaluation counter
disabled
enabled
disabled
enabled
disabled
enabled
DAC1628D1G25
© NXP B.V. 2011. All rights reserved.
56 of 133