dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 46

• Manufacturer Part Number: dac1628d1g25
• Description: Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
• Manufacturer: NXP Semiconductors

Table 30.
Address Register name
2
4
5
6
7
8
9
10 0Ah TEMPS_MAX
11 0Bh TEMPS_MIN
22 16h DAC_PON_SLEEP R/W
23 17h DAC_A_GAIN_LSB R/W
24 18h DAC_A_GAIN_
25 19h DAC_B_GAIN_LSB R/W
26 1Ah DAC_B_GAIN_
27 1Bh DAC_A_AUX_MSB R/W
02h PLLCFG
04h WCLKGENCFG
05h TEMPS_CNTRL
06h TEMPS_LEVEL
07h TEMPS_CLKDIV
08h TEMPS_TIMER
09h TEMPS_OUT
MSB
MSB
10.17.2.1 Page x01 allocation map
Page x01 register allocation map
Table 30
R/W
R/W PLL_BYP
R/W
R/W
R/W
R/W
R/W
R
R
R
R/W
R/W
shows an overview of all registers on page x01.
DAC_A_
TEMP_
SENS_
TEMP_
SENS_
DCLK_
MON_
DAC_A_GAIN[9:8]
DAC_B_GAIN[9:8]
Bit 7
PON
OUT
PON
RST
-
-
-
CLK_DET_
PON
TEMP_
ALARM
TS_RST_
DAC_B_
ALARM
DCLK_
SLEEP
MON
Bit 6
-
-
-
RESERVED
TS_FULL_
RANGE
Bit 5
RESERVED[1:0]
-
-
-
TOGGLE
WCLK_
DAC_A_GAIN[7:0]
DAC_B_GAIN[7:0]
Bit 4
PON
AUX_DAC_A[9:2]
TS_
TS_CLKDIV[7:0]
TS_TIMER[7:0]
Bit definition
-
-
PLL_DIV[1:0]
WCLK_DIV
TS_RST_
TEMP_SEL_MAN[5:0]
DAC_A_
TEMP_ACTUAL[5:0]
_BYP
Bit 3
MAX
PON
TEMP_MAX[5:0]
TEMP_MIN[5:0]
-
-
TS_RST_
DAC_A_
SLEEP
Bit 2
PLL_PH_SEL[1:0]
MIN
-
-
WCLK_DIV_SEL[2:0]
Bit 1
RESERVED[1:0]
TS_MODE[1:0]
-
-
PLL_PON
Bit 0
-
-
Default
Bin
1010
0001
0101
0010
0000
0000
0000
0000
0000
0000
0000
0000
1011
1011
1101
1000
0100
0000
1101
1011
0100
0000
1000
0000
Hex
A1h
52h
00h
00h
00h
00h
uuh
uuh
uuh
BBh
D8h
40h
D8h
40h
80h