dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 73
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
(133 pages)
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NXP Semiconductors
Table 82.
Table 83.
Default settings are shown highlighted.
DAC1628D1G25
Objective data sheet
Bit
3
2
1
0
Address
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
Symbol
SR_SCR_LN3
SR_SCR_LN2
SR_SCR_LN1
SR_SCR_LN0
SOFT_RESET_SCRAMBLER register (address 10h) bit description
Initialization values registers (address 11h to 1Ah) bit description
Register
INIT_SCR_S15T8_LN0
INIT_SCR_S7T1_LN0
INIT_SCR_S15T8_LN1
INIT_SCR_S7T1_LN1
INIT_SCR_S15T8_LN2
INIT_SCR_S7T1_LN2
INIT_SCR_S15T8_LN3
INIT_SCR_S7T1_LN3
INIT_ILA_BUFPTR_LN01 7 to 4
INIT_ILA_BUFPTR_LN23 7 to 4
Bit
7 to 0
6 to 0
7 to 0
6 to 0
7 to 0
6 to 0
7 to 0
6 to 0
3 to 0
3 to 0
All information provided in this document is subject to legal disclaimers.
Symbol
INIT_DESCR_
LN0[15:8]
INIT_DESCR_
LN0[[6:0]
INIT_DESCR_
LN1[15:8]
INIT_DESCR_
LN1[[6:0]
INIT_DESCR_
LN2[15:8]
INIT_DESCR_
LN2[[6:0]
INIT_DESCR_
LN3[15:8]
INIT_DESCR_
LN3[[6:0]
INIT_ILA_
BUFPTR_LN1[3:0]
INIT_ILA_
BUFPTR_LN0[3:0]
INIT_ILA_
BUFPTR_LN3[3:0]
INIT_ILA_
BUFPTR_LN2[3:0]
Rev. 1.1 — 10 October 2011
Access
R/W
R/W
R/W
R/W
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Value
0
1
0
1
0
1
0
1
Access Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
lane 3 scrambler reset
lane 2 scrambler reset
lane 1 scrambler reset
lane 0 scrambler reset
no action
soft_reset scrambler of lane 3
no action
soft_reset scrambler of lane 2
no action
soft_reset scrambler of lane 1
no action
soft_reset scrambler of lane 0
00h
00h
00h
00h
00h
00h
00h
00h
88h
88h
88h
88h
DAC1628D1G25
Description
initialization value for lane 0
descrambler bits s15 to s8
initialization value for lane 0
descrambler bits s7 to s1
initialization value for lane 1
descrambler bits s15 to s8
initialization value for lane 1
descrambler bits s7 to s1
initialization value for lane 2
descrambler bits s15 to s8
initialization value for lane 2
descrambler bits s7 to s1
initialization value for lane 3
descrambler bits s15 to s8
initialization value for lane 3
descrambler bits s7 to s1
initialization value for lane 1 ILA
buffer pointer
initialization value for lane 0 ILA
buffer pointer
initialization value for lane 3 ILA
buffer pointer
initialization value for lane 2 ILA
buffer pointer
© NXP B.V. 2011. All rights reserved.
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