dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 105

• Manufacturer Part Number: dac1628d1g25
• Description: Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 128. Register MISC_CTRL (address 0Bh)
Default values are shown highlighted.
Table 129. LDS/MDS of I/Q DC levels registers (address 0Ch to 0Fh) bit description
Default values are shown highlighted.
Table 130. TYPE_ID registers (address 1Bh to 1Eh) bit description
Default values are shown highlighted.
Table 131. Register PAGE_ADD (address 1Fh)
Default values are shown highlighted.
DAC1628D1G25
Objective data sheet
Bit
3 to 2
1 to 0
Address
0Ch
0Dh
0Eh
0Fh
Address
1Bh
1Ch
1Dh
1Eh
Bit
4 to 0
Symbol
Q_LEV_CTRL[1:0]
CDI_MODE[1:0]
Symbol
PAGE[4:0]
Register
I_DC_LVL_LSB
I_DC_LVL_MSB
Q_DC_LVL_LSB
Q_DC_LVL_MSB
Register
TYPE_ID_0
TYPE_ID_1
TYPE_ID_2
TYPE_ID_3
Bit
7 to 0
7 to 0
7 to 0
7 to 0
Bit
7 to 0
7 to 0
7 to 0
7 to 0
Access
R/W
R/W
Access
R/W
All information provided in this document is subject to legal disclaimers.
Symbol
TYPE_ID_0[7:0]
TYPE_ID_1[7:0]
TYPE_ID_2[7:0]
TYPE_ID_3[7:0]
Symbol
I_DC_LEVEL[7:0]
I_DC_LEVEL[15:8]
Q_DC_LEVEL[7:0]
Q_DC_LEVEL[15:8] R/W
Rev. 1.1 — 10 October 2011
…continued
Value
00
01
10
11
00
01
10
11
Value
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Access
R
R
R
R
Access
R/W
R/W
R/W
Description
specifies output from CDI for Q path
id data enable = 1: the normal operation;
if data enable = 0: digital signal processing
input = Q_DC_LEVEL register value
Description
Page address
specifies CDI mode
normal operation (CDI data output sent to digital
signal processing input)
digital signal processing input = Q_DC_LEVEL
digital signal processing input = Q_DC_LEVEL
cdi_mode 0 (^2 mode)
cdi_mode 1 (^4 mode)
cdi_mode 2 (^8 mode)
not used
Value
-
-
-
-
Value
-
-
-
-
Description
Q_DC_LEVEL
Description
I_DC_LEVEL
I_DC_LEVEL
Q_DC_LEVEL
DAC1628D1G25
least significant 8 bits for
I_DC_LEVEL
most significant 8 bits for
I_DC_LEVEL
least significant 8 bits for
Q_DC_LEVEL
most significant 8 bits for
Q_DC_LEVEL
© NXP B.V. 2011. All rights reserved.
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