dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 43

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dac1628d1g25

Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 27.
Default values are shown highlighted.
Table 28.
Default values are shown highlighted.
DAC1628D1G25
Objective data sheet
Address
16h
17h
Bit
7
6
5
4
3
Symbol
DATA_IQ_VAL
MDS_BSY
CLIP_DET_A
CLIP_DET_B
TEMP_ALARM
Register
MUTE_CTRL1
MUTE_CTRL2
DAC digital offset registers (address 15h to 17h) bit description
Register MUTE_AL_EN (address 18h)
Bit
7 to 6
5 to 4
3 to 2
1 to 0
7
6
5
4
0
Access
R/W
R/W
R/W
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Symbol
ALARM_CFG[1:0]
DATA_V_IQ_CFG[1:0]
CLIP_CFG[1:0]
DIRECT_CFG[1:0]
MC_ALARM_CLR
IGN_RFTX_EN
IGN_MDS_BSY
IGN_DATA_V_IQ
SW_MUTE
Rev. 1.1 — 10 October 2011
Value
0
1
0
1
0
1
0
1
0
1
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Description
enables alarm condition for mute action
Access Value
R/W
R/W
1  0
0  1
0  1
1  0
0  1
1  0
0  1
1  0
0  1
1  0
…continued
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
0
1
0
1
0
1
0
1
0
1
DAC1628D1G25
Description
hard mute and mute_iq
hold mute and mute_iq
soft mute and mute_iq
soft mute
hard mute and mute_iq
hold mute and mute_iq
soft mute and mute_iq
soft mute
hard mute and mute_iq
hold mute and mute_iq
soft mute and mute_iq
soft mute
hard mute and mute_iq
hold mute and mute_iq
soft mute and mute_iq
soft mute
no action
clear mc_alarm flags
no action
ignore rftx_en state
no action
ignore mds_bsy state
no action
ignore internal data-enable state
no action
mute signal (uses direct_cfg)
© NXP B.V. 2011. All rights reserved.
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