dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 64

• Manufacturer Part Number: dac1628d1g25
• Description: Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
• Manufacturer: NXP Semiconductors

Table 69.
Address Register name
0
1
2
3
4
5
6
7
8
9
10 0Ah MAN_ALIGN_
11 0Bh FA_ERR_
12 0Ch SYNCOUT_
13 0Dh LANE_
14 0Eh LANE_SELECT
00h SR_DLP_0
01h SR_DLP_1
02h FORCE_LOCK
03h MAN_LOCK_
04h MAN_LOCK_
05h CA_CTRL
06h SCR-CTRL
07h ILA_CTRL
08h FORCE_ALIGN
09h MAN_ALIGN_
LN_1_0
LN_3_2
LN_1_0
LN_3_2
HANDLING
MODE
POLARITY
10.17.4.1 Page x03 allocation map
Page x03 register allocation map
Table 69
R/W Bit definition
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
shows an overview of all registers on page x03.
b7
SR_CTRL_
LOCK_LN3
SR_SWA_
SWP_LN3
SCR_LN3
FORCE_
WORD_
SEL_KOUT_UNEXP_
LANE_SEL_LN3[1:0]
MAN_
LN3
LN3
-
-
-
LN32[1:0]
SEL_REINIT[2:0]
b6
SR_CTRL_
LOCK_LN2
SR_SWA_
SWP_LN2
SCR_LN2
FORCE_
WORD_
MAN_ALIGN_LN1[3:0]
MAN_ALIGN_LN3[3:0]
MAN_LOCK_LN1[3:0]
MAN_LOCK_LN3[3:0]
MAN_
LN2
LN2
-
-
SEL_ILA[1:0]
b5
SR_CTRL_
LOCK_LN1
SR_SWA_
SWP_LN1
SCR_LN1
FORCE_
WORD_
SEL_KOUT_UNEXP_
LANE_SEL_LN2[1:0]
MAN_
LN1
LN1
-
LN10[1:0]
b4
MSB_MAN_LOCK_LN[3:0]
SYNC_POL SYNC_INIT_
SR_CTRL_
LOCK_LN0
SR_SWA_
SWP_LN0
SCR_LN0
FORCE_
WORD_
MAN_
LN0
LN0
-
SEL_LOCK[2:0]
b3
SR_CA_LN3 SR_CA_LN2 SR_CA_LN1 SR_CA_LN0 0000
SEL_NIT_ERR_LN32[1:0]
_F10_LN3
SR_DEC_
SCR_LN3
POL_LN3
FORCE_
SEL_RF
LANE_SEL_LN1[1:0]
LN3
LVL
-
b2
SR_DEC_
_F10_LN2
SCR_LN2
POL_LN2
FORCE_
SEL_RF
MAN_ALIGN_LN0[3:0]
MAN_ALIGN_LN2[3:0]
MAN_LOCK_LN0[3:0]
MAN_LOCK_LN2[3:0]
LN2
-
SEL_SYNC[3:0]
b1
DYN_ALIGN
SEL_NIT_ERR_LN10[1:0] 0000
ALIGN_EN
_F10_LN1
SR_DEC_
SCR_LN1
SUP_LN_
POL_LN1
FRAME_
FORCE_
SEL_RF
LANE_SEL_LN0[1:0]
SYNC
LN1
_EN
b0
DESCR_EN 0000
SR_DEC_
_F10_LN0
SCR_LN0
POL_LN0
FORCE_
FORCE_
SEL_RF
SR_ILA
ALIGN
LN0
Default
Bin
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0011
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
1110
0100
Hex
00h
00h
00h
00h
00h
00h
00h
03h
00h
00h
00h
00h
00h
00h
E4h