dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 17

• Manufacturer Part Number: dac1628d1g25
• Description: Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
DAC1628D1G25
Objective data sheet
10.2.7.1
10.2.6 Descrambler
10.2.7 Inter-lane alignment
The following comma symbols are detected during data transmission irrespective of the
running disparity:
A flag is sent to the control interface to reflect detected commas in registers KOUT_FLAG
(see
The following flags are also triggered according to the following definitions:
The DAC1628D1G25 supports character replacement whatever the state of the
descrambler. When descrambling is not active (bit DESCR_EN in register ILA_CTRL is
set to logic 0; see
previous sample. When descrambling is active (bit DESCR_EN is set to logic 1), the
corresponding data octet D28.3 (0xC) or D28.7 (0xFC) is used.
The descrambler is a 16-bit parallel self-synchronous descrambler based on the
polynomial 1 + x
ILA_CTRL set to logic 0; see
This feature removes strict PCB design skew compensation between the lanes (bits
SUP_LN_SYNC, SEL_ILA[1:0], SEL_LOCK[2:0]; see
see
This module handles the alignment of the data streams. Because of inter-lane skew, these
alignment characters can be received at different times by the receivers. After the
synchronization period, the lock signal is HIGH, enabling the receipt of
K28.3 /A/ characters.
Single device operation
•
•
•
•
/K/ = K28.5
/F/ = K28.7
/A/ = K28.3
/R/ = K28.0
/Q/ = K28.4
VALID:
A code group that is found in the column of the 10b/8b decoding tables according to
the current running disparity.
DISPARITY ERROR:
The received code group exists in the 10b/8b decoding table, but is not found in the
proper column according to the current running disparity.
NOT-IN-TABLE (NIT) ERROR:
The received code group is not found in the 10b/8b decoding table for either disparity.
INVALID:
A code group that either shows a disparity error or that does not exist in the 10b/8b
decoding table.
Table
Table
76).
94) and K28_FLAG (see
All information provided in this document is subject to legal disclaimers.
14
Table
+ x
Rev. 1.1 — 10 October 2011
15
. This processing can be turned off (bit DESCR_EN in register
75), the received K28.3 /A/ or K28.7 /F/ is replaced by the
Table
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
75).
Table
95).
Table 75
DAC1628D1G25
and bit DYN_ALIGN_EN;
© NXP B.V. 2011. All rights reserved.
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