dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 120

• Manufacturer Part Number: dac1628d1g25
• Description: Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 155. HS_RX_RT_CTRL register (address 11h) bit description
Default values are shown highlighted.
Table 156. HS_RX monitor registers (address 19h to 1Ch) bit description
Default values are shown highlighted.
DAC1628D1G25
Objective data sheet
Bit
7
6
5
4
3
2
1
0
Address
19h
Symbol
HS_RX_3_RT_HIZ_EN
HS_RX_2_RT_HIZ_EN
HS_RX_1_RT_HIZ_EN
HS_RX_0_RT_HIZ_EN
HS_RX_3_RT_EN
HS_RX_2_RT_EN
HS_RX_1_RT_EN
HS_RX_1_RT_EN
Register
HS_RX_0_MON
Bit
3
2
1
0
Symbol
HS_RX_0_EQ_TST_DTY_
OUT
HS_RX_0_EQ_OFS_POL
HS_RX_0_LOCK_REF_
CLK
HS_RX_0_CDR_FACQ_
BUSY
Access Value
R
R
R
R
R
R
R
R
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 October 2011
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
hs_rx_ln3 input
hs_rx_ln2 input
hs_rx_ln1 input
hs_rx_ln0 input
Termination of rx_ln3
Termination of rx_ln2
Termination of rx_ln1
Termination of rx_ln0
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
100  (differential impedance)
high ohmic
100  (differential impedance)
high ohmic
100  (differential impedance)
high ohmic
100  (differential impedance)
high ohmic
disabled (power-down)
enabled (active)
disabled (power-down)
enabled (active)
disabled (power-down)
enabled (active)
disabled (power-down)
enabled (active)
Access
R
R
R
R
Value
0
1
0
1
-
Description
actual state
hs_rx_0_eq_test_duty_out
hs_rx_ln0 equalizer offset
hs_rx_0 lock to reference clock
actual state
hs_rx_0_eq_test_duty_out (not
used)
DAC1628D1G25
negative
positive
not locked to reference clock
(pfd mode)
locked to reference clock
(pfd mode)
© NXP B.V. 2011. All rights reserved.
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