dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 125

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dac1628d1g25

Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
13. Glossary
DAC1628D1G25
Objective data sheet
13.1 Static parameters
13.2 Dynamic parameters
INL — The deviation of the transfer function from a best fit straight line (linear regression
computation).
DNL — The difference between the ideal and the measured output value between
successive DAC codes.
Spurious-Free Dynamic Range (SFDR) — The ratio between the RMS value of the
reconstructed output sine wave and the RMS value of the largest spurious observed
(harmonic and non-harmonic, excluding DC component) in the frequency domain.
InterModulation Distortion (IMD) — From a dual-tone digital input sine wave (these two
frequencies being close together), the intermodulation distortion products IMD2 and IMD3
(second order and third order components) are defined below.
IMD2 — The ratio between the RMS value of either tone and the RMS value of the worst
second order intermodulation product.
IMD3 — The ratio between the RMS value of either tone and the RMS value of the worst
third order intermodulation product.
Total Harmonic Distortion (THD) — The ratio between the RMS value of the harmonics
of the output frequency and the RMS value of the output sine wave. Usually, the
calculation of THD is done on the first 5 harmonics.
Signal-to-Noise Ratio (SNR) — The ratio between the RMS value of the reconstructed
output sine wave and the RMS value of the noise excluding the harmonics and the DC
component.
Restricted BandWidth Spurious-Free Dynamic Range (SFDR
between the RMS value of the reconstructed output sine wave and the RMS value of the
noise, including the harmonics, in a given bandwidth centered around f
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 October 2011
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
DAC1628D1G25
RBW
) — the ratio
offset
© NXP B.V. 2011. All rights reserved.
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