dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 107

• Manufacturer Part Number: dac1628d1g25
• Description: Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
• Manufacturer: NXP Semiconductors

Table 132. Page x10 register allocation map
Address Register name
0
1
2
3
4
5
6
7
8
9
10 0Ah
11 0Bh
12 0Ch
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
HS_REF_EN
HS_REF_POLY_
TRIM
HS_RX_CDR_DIV R/W
HS_RX_CDR_CP
HS_RX_CDR_
LOOP
HS_RX_CDR_
EN_0
HS_RX_CDR_
EN_1
HS_RX_EQ_
CTRL
HS_RX_0_EQ_
GAIN
HS_RX_1_EQ_
GAIN
HS_RX_2_EQ_
GAIN
HS_RX_3_EQ_
GAIN
HS_RX_0_EQ_
OFFSET
10.17.8.1 Page x10 register allocation map
Table 132
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
shows an overview of all registers on page x10.
HS_RX_CDR_LOOP_RZ_TRACK[2:0]
CDR_LOW
HS_RX_3_
FACQ_EN
_SPEED_
HS_RX_
CDR_
Bit 7
EN
-
-
-
-
-
-
-
-
-
HS_RX_CDR_CP_IUP[3:0]
HS_RX_CDR_DIVM[1:0]
HS_RX_2_
HS_RX_0_
EQ_INPUT
FACQ_EN
_SHORT
CDR_
Bit 6
-
-
-
-
-
-
-
-
HS_RX_EQ
HS_RX_1_
FACQ_EN
DUTY_EN
_TEST_
HS_RX_0_EQ_HF_
HS_RX_1_EQ_HF_
HS_RX_2_EQ_HF_
HS_RX_3_EQ_HF_
CDR_
Bit 5
-
-
GAIN[1:0]
GAIN[1:0]
GAIN[1:0]
GAIN[1:0]
EQ_AUTO_
HS_RX_0_
ZERO_EN
FACQ_EN
HS_RX_CDR_LOOP_RZ_RUNIN[2:0]
HS_RX_
CDR_
Bit 4
-
-
Bit definition
HS_RX_0_EQ_OFFSET[5:0]
HS_REF_POLY_TRIM[5:0]
HS_RX_3_
HS_RX_3_
HS_RX_3_
DATA_EN
CDR_EN
TRACK_
EQ_EN
CDR_
Bit 3
-
-
-
-
-
HS_RX_CDR_DIVN[4:0]
HS_RX_CDR_CP_IDW[3:0]
HS_RX_2_
HS_RX_2_
HS_RX_2_
TUNE_EN
HS_REF_
DATA_EN
CDR_EN
TRACK_
EQ_EN
CDR_
Bit 2
HS_RX_0_EQ_IF_GAIN[2:0]
HS_RX_1_EQ_IF_GAIN[2:0]
HS_RX_2_EQ_IF_GAIN[2:0]
HS_RX_3_EQ_IF_GAIN[2:0]
HS_RX_1_
HS_RX_1_
HS_RX_1_
HS_REF_
DATA_EN
CDR_EN
CAL_EN
TRACK_
HS_RX_CDR_LOOP_
EQ_EN
CDR_
Bit 1
CAP[1:0]
HS_RX_0_
HS_RX_0_
HS_RX_0_
HS_REF_
DATA_EN
CDR_EN
TRACK_
EQ_EN
CDR_
Bit 0
EN
Default
Bin
0000
0101
0000
0000
0000
0010
1111
1111
0001
0111
0000
1111
0000
0000
0001
1111
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
Hex
05h
00h
02h
FFh
17h
0Fh
00h
1Fh
00h
00h
00h
00h
00h