dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 19
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
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NXP Semiconductors
DAC1628D1G25
Objective data sheet
10.3.1 Protocol description
10.3 Serial Peripheral Interface (SPI)
The DAC1628D1G25 serial interface is a synchronous serial communication port allowing
easy interfacing with many industry microprocessors. It provides access to the registers
that define the operating modes of the chip in both Write mode and Read mode.
This interface can be configured as a 3-wire type (SDIO as bidirectional pin) or a 4-wire
type (SDIO and SDO as unidirectional pin, input and output port respectively). In both
configurations, SCLK acts as the serial clock and SCS_N acts as the serial chip select.
Each read/write operation is sequenced by the SCS_N signal and enabled by a LOW
assertion to drive the chip with 2 bytes to 5 bytes, depending on the content of the
instruction byte.
As the DAC1628D1G25 SPI-interface is a slave-device, multiple slave-devices can be
attached to the same master interface as long as each device has its own serial chip
select signal (SCS_N). The reference voltage of the interface is V
Fig 6.
Lane 0
Lane 1
Lane 2
Lane 3
Frame assembly byte representation
LMF=421
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 10 October 2011
LMF=422
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
LMF=222
DAC1628D1G25
DDD(1V8)
© NXP B.V. 2011. All rights reserved.
.
LMF=124
aaa-000271
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