UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 82

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

3.3.4 Register addressing
3.4 Operand Address Addressing
during instruction execution.
3.4.1 Implied addressing
82
[Function]
[Illustration]
The following methods are available to specify the register and memory (addressing) to undergo manipulation
[Function]
[Operand format]
[Description example]
Register pair (AX) contents to be specified with an instruction word are transferred to the program counter (PC)
and branched.
This function is carried out when the BR AX instruction is executed.
The register that functions as an accumulator (A and AX) among the general-purpose registers is automatically
(implicitly) addressed.
Of the 78K0/KE2 instruction words, the following instructions employ implied addressing.
Because implied addressing can be automatically determined with an instruction, no particular operand format is
necessary.
In the case of MULU X
With an 8-bit
the A and AX registers are specified by implied addressing.
MULU
DIVUW
ADJBA/ADJBS
ROR4/ROL4
Instruction
8-bit multiply instruction, the product of A register and X register is stored in AX. In this example,
AX register for dividend and quotient storage
A register for multiplicand and AX register for product storage
A register for storage of numeric values that become decimal correction targets
A register for storage of digit data that undergoes digit rotation
rp
PC
7
15
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17260EJ6V0UD
A
Register to Be Specified by Implied Addressing
0
8
7
7
X
0
0