UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 125

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

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5.2.9 Port 12
using port mode register 12 (PM12). When used as an input port only for P120, use of an on-chip pull-up resistor can
be specified by pull-up resistor option register 12 (PU12).
detection, connecting resonator for main system clock, connecting resonator for subsystem clock, external clock input
for main system clock, and external clock input for subsystem clock.
Port 12 is a 5-bit I/O port with an output latch. Port 12 can be set to the input mode or output mode in 1-bit units
This port can also be used as pins for external interrupt request input, potential input for external low-voltage
Reset signal generation sets port 12 to input mode.
Figures 5-22 and 5-23 show block diagrams of port 12.
Cautions 1. When using the P121 to P124 pins to connect a resonator for the main system clock (X1, X2)
Note OCD0A is provided to the
Remarks 1. For the product ranks, consult an NEC Electronics sales representative.
2. Only for the
2. For products without an on-chip debug function and with the flash memory of 48 KB or more
OCD0B) when the on-chip debug function is used.
supporting on-chip debugging (QB-78K0MINI or QB-MINI2), see CHAPTER 27 ON-CHIP DEBUG
FUNCTION (
or subsystem clock (XT1, XT2), or to input an external clock for the main system clock
(EXCLK) or subsystem clock (EXCLKS), the X1 oscillation mode, XT1 oscillation mode, or
external clock input mode must be set by using the clock operation mode select register
(OSCCTL) (for details, see 6.3 (1) Clock operation mode select register (OSCCTL) and (3)
Setting of operation mode for subsystem clock pin). The reset value of OSCCTL is 00H (all of
the P121 to P124 pins are I/O port pins). At this time, setting of the PM121 to PM124 and P121
to P124 pins is not necessary.
(
and for the product with an on-chip debug function (
OCD0A
• P121/X1/OCD0A
The above connection is not necessary when writing the flash memory by means of self
programming.
µ
PD78F0534, 78F0535, 78F0536, and 78F0537) and having a product rank of “I”, “K”, or “E”,
Note
as follows when writing the flash memory with a flash programmer.
µ
µ
PD78F0537D, X1 and X2 can be used as on-chip debug mode setting pins (OCD0A,
PD78F0537D ONLY).
µ
Note
PD78F0537D only.
: When using this pin as a port, connect it to V
recommended) (in the input mode) or leave it open (in the output mode).
CHAPTER 5 PORT FUNCTIONS
User’s Manual U17260EJ6V0UD
For how to connect an in-circuit emulator
µ
PD78F0537D), connect P121/X1/
SS
via a resistor (10 kΩ:
125