UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 521

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

Note
Remark f
Item
System clock
CPU
Flash memory
RAM
Port (latch)
16-bit timer/event
counter
8-bit timer/event
counter
8-bit timer
Watch timer
Watchdog timer
Clock output
Buzzer output
A/D converter
Serial interface
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
RL
µ
PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D only.
f
f
f
f
f
RH
X
EXCLK
XT
EXCLKS
RL
HALT Mode Setting
:
:
:
:
Note
:
: External subsystem clock
UART0
UART6
CSI10
CSI11
IIC0
Internal high-speed oscillation clock
X1 clock
External main system clock
XT1 clock
Internal low-speed oscillation clock
f
f
f
f
f
RH
X
EXCLK
XT
EXCLKS
00
01
50
51
H0
H1
Note
Note
Clock supply to the CPU is stopped
Operation continues (cannot
be stopped)
Status before HALT mode
was set is retained
Operates or stops by external clock input
Status before HALT mode was set is retained
Operates or stops by external clock input
Status before HALT mode was set is retained
Operation stopped
Operation stopped
Status before HALT mode was set is retained
Status before HALT mode was set is retained
Operable
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operable
Table 21-1. Operating Statuses in HALT Mode (1/2)
When CPU Is Operating on
Oscillation Clock (f
Internal High-Speed
When HALT Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 21 STANDBY FUNCTION
User’s Manual U17260EJ6V0UD
RH
)
Status before HALT mode was set is retained
Operation continues (cannot
be stopped)
When CPU Is Operating on
X1 Clock (f
X
)
Status before HALT mode
was set is retained
Operation continues (cannot
be stopped)
External Main System Clock
When CPU Is Operating on
(f
EXCLK
)
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