UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 326

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
13.4.3 A/D converter operation mode
ANI7 by the analog input channel specification register (ADS) and A/D conversion is executed.
(1) A/D conversion operation
326
A/D conversion
The operation mode of the A/D converter is the select mode. One channel of analog input is selected from ANI0 to
By setting bit 7 (ADCS) of the A/D converter mode register (ADM) to 1, the A/D conversion operation of the
voltage, which is applied to the analog input pin specified by the analog input channel specification register
(ADS), is started.
When A/D conversion has been completed, the result of the A/D conversion is stored in the A/D conversion result
register (ADCR), and an interrupt request signal (INTAD) is generated. When one A/D conversion has been
completed, the next A/D conversion operation is immediately started.
If ADS is rewritten during A/D conversion, the A/D conversion operation under execution is stopped and restarted
from the beginning.
If 0 is written to ADCS during A/D conversion, A/D conversion is immediately stopped.
conversion result immediately before is retained.
Remarks 1. n = 0 to 7
ADCRH
ADCR,
INTAD
2. m = 0 to 7
Rewriting ADM
ADCS = 1
ANIn
Figure 13-13. A/D Conversion Operation
CHAPTER 13 A/D CONVERTER
User’s Manual U17260EJ6V0UD
ANIn
ANIn
Conversion is stopped
Conversion result immediately
before is retained
Rewriting ADS
ANIn
ANIn
ANIm
ANIm
ADCS = 0
ANIm
At this time, the
Stopped
Conversion result
immediately before
is retained

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