UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 155

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

6.4.3 When subsystem clock is not used
subsystem clock as an I/O port, set the XT1 and XT2 pins to I/O mode (OSCSELS = 0) and connect them as follows.
6.4.4 Internal high-speed oscillator
oscillation mode register (RCM).
6.4.5 Internal low-speed oscillator
internal low-speed oscillation clock cannot be used as the CPU clock.
by software” is set, oscillation can be controlled by the internal oscillation mode register (RCM).
driven (240 kHz (TYP.)) if the watchdog timer operation is enabled using the option byte.
6.4.6 Prescaler
as the clock to be supplied to the CPU.
If it is not necessary to use the subsystem clock for low power consumption operations, or if not using the
Input (PM123/PM124 = 1):
Output (PM123/PM124 = 0): Leave open.
Remark OSCSELS:
The internal high-speed oscillator is incorporated in the 78K0/KE2. Oscillation can be controlled by the internal
After a reset release, the internal high-speed oscillator automatically starts oscillation (8 MHz (TYP.)).
The internal low-speed oscillator is incorporated in the 78K0/KE2.
The internal low-speed oscillation clock is only used as the watchdog timer and the clock of 8-bit timer H1. The
“Can be stopped by software” or “Cannot be stopped” can be selected by the option byte. When “Can be stopped
After a reset release, the internal low-speed oscillator automatically starts oscillation, and the watchdog timer is
The prescaler generates various clocks by dividing the main system clock when the main system clock is selected
PM123, PM124: Bits 3 and 4 of port mode register 12 (PM12)
Bit 4 of clock operation mode select register (OSCCTL)
Independently connect to V
CHAPTER 6 CLOCK GENERATOR
User’s Manual U17260EJ6V0UD
DD
or V
SS
via a resistor.
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