UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 730

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

730
Clock
generator
X1/XT1
oscillator
Clock
generator
operation
when
power
supply
voltage is
turned on
Controlling
high-speed
system
clock
Function
OSTC:
Oscillation
stabilization time
counter status
register
OSTS:
Oscillation
stabilization time
select register
X1/P121,
X2/EXCLK/P122
X1 clock
Details of
Function
−
−
After the above time has elapsed, the bits are set to 1 in order from MOST11 and
remain 1.
The oscillation stabilization time counter counts up to the oscillation stabilization
time set by OSTS. If the STOP mode is entered and then released while the
internal high-speed oscillation clock is being used as the CPU clock, set the
oscillation stabilization time as follows.
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time set by
Note, therefore, that only the status up to the oscillation stabilization time set by
OSTS is set to OSTC after STOP mode is released.
The X1 clock oscillation stabilization wait time does not include the time until clock
oscillation starts (“a” below).
To set the STOP mode when the X1 clock is used as the CPU clock, set OSTS
before executing the STOP instruction.
Do not change the value of the OSTS register during the X1 clock oscillation
stabilization time.
The oscillation stabilization time counter counts up to the oscillation stabilization
time set by OSTS. If the STOP mode is entered and then released while the
internal high-speed oscillation clock is being used as the CPU clock, set the
oscillation stabilization time as follows.
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time set by
Note, therefore, that only the status up to the oscillation stabilization time set by
OSTS is set to OSTC after STOP mode is released.
The X1 clock oscillation stabilization wait time does not include the time until clock
oscillation starts (“a” below).
When using the X1 oscillator and XT1 oscillator, wire as follows in the area
enclosed by the broken lines in the Figures 6-9 and 6-10 to avoid an adverse
effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines. Do not route the wiring near
• Always make the ground point of the oscillator capacitor the same potential as
• Do not fetch signals from the oscillator.
Note that the XT1 oscillator is designed as a low-amplitude circuit for reducing
power consumption.
When X2 and XT1 are wired in parallel, the crosstalk noise of X2 may increase
with XT1, resulting in malfunctioning.
It is not necessary to wait for the oscillation stabilization time when an external
clock input from the EXCLK and EXCLKS pins is used.
A voltage oscillation stabilization time of 1.93 to 5.39 ms is required after the
power supply voltage reaches 1.59 V (TYP.). If the supply voltage rises from 1.59
V (TYP.) to 2.7 V (TYP.) within 1.93 ms, the power supply oscillation stabilization
time of 0 to 5.39 ms is automatically generated before reset processing.
The X1/P121 and X2/EXCLK/P122 pins are in the I/O port mode after a reset
release.
Do not change the value of EXCLK and OSCSEL while the X1 clock is operating. p. 160
OSTS
OSTS
a signal line through which a high fluctuating current flows.
V
current flows.
SS
. Do not ground the capacitor to a ground pattern through which a high
APPENDIX D LIST OF CAUTIONS
User’s Manual U17260EJ6V0UD
Cautions
p. 150
p. 150
p. 150
p. 151
p. 151
p. 151
p. 151
p. 153
p. 154
pp. 158,
159
p. 159
p. 160
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