UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 452

no-image

UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
452
(1) Master operation in single-master system
Note Release (SCL0 and SDA0 pins = high level) the I
Remark
product that is communicating. If EEPROM is outputting a low level to the SDA0 pin, for example, set the
SCL0 pin in the output port mode, and output a clock pulse from the output port until the SDA0 pin is
constantly at high level.
Conform to the specifications of the product that is communicating, with respect to the transmission and
reception formats.
No
No
ACKE0 = WTIM0 = SPIE0 = 1
Setting STCEN, IICRSV = 0
Figure 17-23. Master Operation in Single-Master System
Initializing I
Interrupt occurs?
interrupt occurs?
interrupt occurs?
IICCL0 ← XXH
End of transfer?
SVA0 ← XXH
IICC0 ← XXH
IICX0 ← 0XH
IICF0 ← 0XH
STCEN = 1?
ACKD0 = 1?
ACKD0 = 1?
Writing IIC0
Writing IIC0
Setting port
TRC0 = 1?
IICE0 = 1
SPT0 = 1
STT0 = 1
INTIIC0
INTIIC0
INTIIC0
Restart?
START
2
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
C bus
CHAPTER 17 SERIAL INTERFACE IIC0
Note
Waits for detection of the stop condition.
Yes
No
No
No
No
No
No
User’s Manual U17260EJ6V0UD
Prepares for starting communication
(generates a stop condition).
Starts transmission.
Waits for data transmission.
Prepares for starting communication
(generates a start condition).
Starts communication
(specifies an address and transfer
direction).
Waits for detection of acknowledge.
Sets each pin in the I
Selects a transfer clock.
Sets a local address.
Sets a start condition.
SPT0 = 1
END
2
C mode (see 17.3 (7) Port mode register 6 (PM6)).
2
C bus in conformance with the specifications of the
WTIM0 = WREL0 = 1
interrupt occurs?
interrupt occurs?
End of transfer?
Reading IIC0
WREL0 = 1
ACKE0 = 0
ACKE0 = 1
WTIM0 = 0
INTIIC0
INTIIC0
Yes
Yes
Yes
No
No
No
Waits for data
reception.
Starts reception.
Waits for detection
of acknowledge.

Related parts for UPD78F0537DGA(T)-9EV-A