UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 121
UPD78F0537DGA(T)-9EV-A
Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0537DGA(T)-9EV-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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5.2.6 Port 5
using port mode register 5 (PM5). When the P50 to P53 pins are used as an input port, use of an on-chip pull-up
resistor can be specified in 1-bit units by pull-up resistor option register 5 (PU5).
Port 5 is a 4-bit I/O port with an output latch. Port 5 can be set to the input mode or output mode in 1-bit units
Reset signal generation sets port 5 to input mode.
Figure 5-17 shows a block diagram of port 5.
P5:
PU5:
PM5:
RD:
WR××: Write signal
WR
WR
WR
RD
PORT
Read signal
Port register 5
Pull-up resistor option register 5
Port mode register 5
PU
PM
PM50 to PM53
PU50 to PU53
(P50 to P53)
Output latch
PU5
PM5
P5
Figure 5-17. Block Diagram of P50 to P53
CHAPTER 5 PORT FUNCTIONS
User’s Manual U17260EJ6V0UD
Selector
EV
DD
P-ch
P50 to P53
121
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