UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 342

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
<R>
(4) Port mode register 1 (PM1)
342
Note 2. Note the following points when selecting the TM50 output as the base clock.
Cautions 1. Make sure that bit 6 (TXE0) and bit 5 (RXE0) of the ASIM0 register = 0 when rewriting the
Remarks 1. f
This register sets port 1 input/output in 1-bit units.
When using the P10/TxD0/SCK10 pin for serial interface data output, clear PM10 to 0 and set the output latch of
P10 to 1.
When using the P11/RxD0/SI10 pin for serial interface data input, set PM11 to 1. The output latch of P11 at this
time may be 0 or 1.
PM1 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Address: FF21H
Symbol
PM1
• Mode in which the count clock is cleared and started upon a match of TM50 and CR50 (TMC506 = 0)
• PWM mode (TMC506 = 1)
It is not necessary to enable (TOE50 = 1) TO50 output in any mode.
2. The baud rate value is the output clock of the 5-bit counter divided by 2.
2. f
3. k:
4. ×:
5. TMC506: Bit 6 of 8-bit timer mode control register 50 (TMC50)
Start the operation of 8-bit timer/event counter 50 first and then enable the timer F/F inversion
operation (TMC501 = 1).
Start the operation of 8-bit timer/event counter 50 first and then set the count clock to make the duty =
50%.
MDL04 to MDL00 bits.
PM17
PM1n
TMC501: Bit 1 of TMC50
XCLK0
PRS
7
0
1
:
After reset: FFH
: Frequency of base clock selected by the TPS01 and TPS00 bits
Peripheral hardware clock frequency
Value set by the MDL04 to MDL00 bits (k = 8, 9, 10, ..., 31)
Don’t care
Output mode (output buffer on)
Input mode (output buffer off)
PM16
6
Figure 14-5. Format of Port Mode Register 1 (PM1)
CHAPTER 14 SERIAL INTERFACE UART0
PM15
5
R/W
P1n pin I/O mode selection (n = 0 to 7)
User’s Manual U17260EJ6V0UD
PM14
4
PM13
3
PM12
2
PM11
1
PM10
0

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