UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 241

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
(c) 16-bit timer output control register 0n (TOC0n)
(d) Prescaler mode register 0n (PRM0n)
Remark n = 0:
ES1n1
0/1
0
0
0
n = 0, 1:
OSPT0n
ES1n0
Figure 7-56. Example of Register Settings for Pulse Width Measurement (1/2)
0/1
0
0
0
µ
µ
OSPE0n
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
ES0n1
0
0/1
0
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
TOC0n4
ES0n0
0
0
0/1
0
TMC0n3 TMC0n2 TMC0n1
LVS0n
0/1
0
User’s Manual U17260EJ6V0UD
0
3
0
CRC0n2 CRC0n1 CRC0n0
0/1
LVR0n
1
0
2
0
PRM0n1 PRM0n0
TOC0n1
0/1
0
0/1
0
OVF0n
0
1
TOE0n
0/1
0
Selects count clock
(setting valid edge of TI00n is prohibited)
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
01: Free running timer mode
10: Clear and start mode entered
1: CR00n used as capture register
0: TI01n pin is used as capture
1: Reverse phase of TI00n pin is
1: CR01n used as capture register
(setting when CRC0n1 = 1 is prohibited)
trigger of CR00n.
used as capture trigger of CR00n.
by valid edge of TI00n pin.
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