UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 222
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UPD78F0537DGA(T)-9EV-A
Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0537DGA(T)-9EV-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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Compare match interrupt
This is an application example where a compare register and a capture register are used at the same time in the
free-running timer mode.
In this example, the INTTM00n signal is generated and the TO0n output level is reversed each time the count
value of TM0n matches the set value of CR00n (compare register).
generated and the count value of TM0n is captured to CR01n each time the valid edge of the TI00n pin is
detected.
Remark n = 0:
Capture trigger input
(TMC0n3, TMC0n2)
Compare register
Capture interrupt
Capture register
TM0n register
Operable bits
Overflow flag
TO0n output
(INTTM00n)
(INTTM01n)
n = 0, 1:
(OVF0n)
(CR00n)
(CR01n)
FFFFH
(TI00n)
0000H
µ
µ
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
Figure 7-40. Timing Example of Free-Running Timer Mode
• TOC0n = 13H, PRM0n = 10H, CRC0n = 04H, TMC0n = 04H
00
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
(CR00n: Compare Register, CR01n: Capture Register)
0000H
0000H
01
M
User’s Manual U17260EJ6V0UD
0 write clear
M
N
0 write clear
N
S
In addition, the INTTM01n signal is
0 write clear
S
P
0 write clear
P
Q
Q
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