UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 264

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
(1) PWM output basic operation
264
<1> Set each register.
<2> The count operation starts when TCE5n = 1.
Note 8-bit timer/event counter 50: P17, PM17
<1> PWM output (TO5n output) outputs an inactive level until an overflow occurs.
<2> When an overflow occurs, the active level is output. The active level is output until CR5n matches the count
<3> After the CR5n matches the count value, the inactive level is output until an overflow occurs again.
<4> Operations <2> and <3> are repeated until the count operation stops.
<5> When the count operation is stopped with TCE5n = 0, PWM output becomes inactive.
Remark n = 0, 1
Setting
PWM output operation
• Clear the port output latch (P17 or P33)
• TCL5n: Select the count clock.
• CR5n:
• TMC5n: Stop the count operation, select PWM mode.
Clear TCE5n to 0 to stop the count operation.
value of 8-bit timer counter 5n (TM5n).
For details of timing, see Figures 8-14 and 8-15.
The cycle, active-level width, and duty are as follows.
• Cycle = 2
• Active-level width = Nt
• Duty = N/2
8-bit timer/event counter 51: P33, PM33
(N = 00H to FFH)
8
Compare value
The timer output F/F is not changed.
Timer output enabled
(TMC5n = 01000001B or 01000011B)
t
TMC5n1
8
0
1
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50 AND 51
Active-high
Active-low
User’s Manual U17260EJ6V0UD
Active Level Selection
Note
and port mode register (PM17 or PM33)
Note
to 0.

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