UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 526

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

Notes 1. Do not start operation of these functions on the external clock input from peripheral hardware pins in the
Remark f
526
Item
System clock
CPU
Flash memory
RAM
Port (latch)
16-bit timer/event
counter
8-bit timer/event
counter
8-bit timer
Watch timer
Watchdog timer
Clock output
Buzzer output
A/D converter
Serial interface
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
RL
2. PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D only.
stop mode.
f
f
f
f
f
RH
X
EXCLK
XT
EXCLKS
RL
STOP Mode Setting
:
:
:
:
Note2
:
: External subsystem clock
UART0
UART6
CSI10
CSI11
IIC0
Internal high-speed oscillation clock
X1 clock
External main system clock
XT1 clock
Internal low-speed oscillation clock
00
01
50
51
H0
H1
Note1
f
f
f
f
f
RH
X
EXCLK
XT
EXCLKS
Notes1, 2
Notes1, 2
Note1
Note1
Note1
Note1
Clock supply to the CPU is stopped
Stopped
Input invalid
Status before STOP mode was set is retained
Operates or stops by external clock input
Status before STOP mode was set is retained
Operation stopped
Operation stopped
Status before STOP mode was set is retained
Status before STOP mode was set is retained
Operation stopped
Operable only when TI50 is selected as the count clock
Operable only when TI51 is selected as the count clock
Operable only when TM50 output is selected as the count clock during 8-bit timer/event counter
50 operation
Operable only when f
Operable only when subsystem clock is selected as the count clock
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operable only when subsystem clock is selected as the count clock
Operation stopped
Operable only when TM50 output is selected as the serial clock during 8-bit timer/event counter
50 operation
Operable only when external clock is selected as the serial clock
Operable only when the external clock from EXSCL0/P62 pin is selected as the serial clock
Operation stopped
Operable
When CPU Is Operating on
Table 21-3. Operating Statuses in STOP Mode
Oscillation Clock (f
Internal High-Speed
When STOP Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 21 STANDBY FUNCTION
User’s Manual U17260EJ6V0UD
RL
RH
, f
RL
)
/2
7
, f
RL
/2
When CPU Is Operating on
9
is selected as the count clock
X1 Clock (f
X
)
External Main System Clock
When CPU Is Operating on
(f
EXCLK
)