UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 770

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
770
5th edition
Edition
Change of reset processing time in and addition of oscillation accuracy stabilization
wait time and Caution 2 to (2) In 2.7 V/1.59 V POC mode (option byte: POCMODE
= 1) in Figure 23-2 Timing of Generation of Internal Reset Signal by Power-on-
Clear Circuit and Low-Voltage Detector
Change and addition of description in 24.1 Functions of Low-Voltage Detector
Change of description of LVIMD bit in Figure 24-2 Format of Low-Voltage
Detection Register (LVIM)
Change and addition of description in 24.4 Operation of Low-Voltage Detector
Change of description in 24.4.2 When used as interrupt
Change of Figure 24-7 Timing of Low-Voltage Detector Interrupt Signal
Generation (Detects Level of Supply Voltage (V
Low-Voltage Detector Interrupt Signal Generation (Detects Level of Input
Voltage from External Input Pin (EXLVI))
Change of description in (2) When used as interrupt in 24.5 Cautions for Low-
Voltage Detector
Addition of Caution to (1) 0080H/1080H and (2) 0081H/1081H in 25.1 Functions
of Option Bytes
Change of Caution 2 in Figure 25-1 Format of Option Byte (1/2)
Addition of Note 1 to Table 26-1 Internal Memory Size Switching Register
Settings
Addition of Note to Table 26-2 Internal Expansion RAM Size Switching Register
Settings
Change of Note 2 in Table 26-3 Wiring Between 78K0/KC2 and Dedicated Flash
Memory Programmer
Addition of Note to Figure 26-4 Example of Wiring Adapter for Flash Memory
Writing in UART (UART6) Mode
Addition of Note to Figure 26-7 Communication with Dedicated Flash Memory
Programmer (UART6)
Change of Note 1 in Table 26-4 Pin Connection
Change of Figure 26-8 FLMD0 Pin Connection Example and change of description
Addition of description, Caution 3, Note, and Remark to 26.6.6 Other signal pins
Addition of description to 26.6.7 Power supply
Change of Table 26-7 Communication Modes
Change of Table 26-8 Flash Memory Control Commands
Partial change of description in and addition of description to 26.8 Security Settings
Change of Table 26-10 Relationship Between Enabling Security Function and
Command
Change of Table 26-11 Setting Security in Each Programming Mode
Addition of 26.9 Processing Time for Each Command When PG-FP4 Is Used
(Reference)
Deletion of Caution 5 in the previous edition from 26.10 Flash Memory
Programming by Self-Programming
Change of Figure 26-16 Flow of Self Programming (Rewriting Flash Memory)
Addition of Table 26-13 Processing Time and Interrupt Response Time for Self
Programming Sample Library
Partial change of boot start position in Figure 26-17 Boot Swap Function
APPENDIX E REVISION HISTORY
User’s Manual U17260EJ6V0UD
Description
DD
)) and Figure 24-8 Timing of
CHAPTER 23 POWER-
ON-CLEAR CIRCUIT
CHAPTER 24 LOW-
VOLTAGE DETECTOR
CHAPTER 25 OPTION
BYTE
CHAPTER 26 FLASH
MEMORY
Chapter
(14/16)

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