UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 105

no-image

UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
5.2.1 Port 0
using port mode register 0 (PM0). When the P00 to P06 pins are used as an input port, use of an on-chip pull-up
resistor can be specified in 1-bit units by pull-up resistor option register 0 (PU0).
Port 0 is a 7-bit I/O port with an output latch. Port 0 can be set to the input mode or output mode in 1-bit units
This port can also be used for timer I/O, serial interface data I/O, clock I/O, and chip select input.
Reset signal generation sets port 0 to input mode.
Figures 5-2 to 5-7 show block diagrams of port 0.
Caution To use P02/SO11
Note Available only in the
P0:
PU0:
PM0:
RD:
WR××: Write signal
WR
WR
WR
register 11 (CSIM11) and serial clock selection register 11 (CSIC11) to the default status (00H).
RD
PORT
PU
PM
Read signal
Port register 0
Pull-up resistor option register 0
Port mode register 0
Alternate function
Output latch
µ
PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D.
PM00
PU00
(P00)
PU0
PM0
Note
P0
and P04/SCK11
Figure 5-2. Block Diagram of P00
CHAPTER 5 PORT FUNCTIONS
User’s Manual U17260EJ6V0UD
Note
as general-purpose ports, set serial operation mode
EV
DD
P-ch
P00/TI000
105

Related parts for UPD78F0537DGA(T)-9EV-A