UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 211

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

<R>
This is an application example where the TO0n output level is to be inverted when the count value has been
captured & cleared.
TM0n is cleared at the rising edge detection of the TI00n pin and it is captured to CR00n at the falling edge
detection of the TI00n pin.
When bit 1 (CRC0n1) of capture/compare control register 0n (CRC0n) is set to 1, the count value of TM0n is
captured to CR00n in the phase reverse to that of the signal input to the TI00n pin, but the capture interrupt signal
(INTTM00n) is not generated. However, the INTTM00n signal is generated when the valid edge of the TI01n pin
is detected. Mask the INTTM00n signal when it is not used.
Remark n = 0:
Capture & count clear input
Compare match interrupt
Figure 7-32. Timing Example of Clear & Start Mode Entered by TI00n Pin Valid Edge Input
(TMC0n3, TMC0n2)
n = 0, 1:
Compare register
Capture interrupt
(TI00n pin input)
Capture register
(a) TOC0n = 13H, PRM0n = 10H, CRC0n, = 03H, TMC0n = 08H, CR01n = 0001H
TM0n register
Operable bits
TO0n output
(INTTM00n)
(INTTM01n)
µ
µ
(CR00n)
(CR01n)
(CR00n: Capture Register, CR01n: Compare Register) (1/2)
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
0000H
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
L
00
0000H
0001H
User’s Manual U17260EJ6V0UD
10
M
M
N
N
S
S
P
P
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