XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 90

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

Classic PCI Configuration Space
4.60 GPIO Data Register
† These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
80
15:8
BIT
7†
6†
5†
4†
3†
2†
1†
0†
SCPS155C
This register reads the state of the input mode GPIO terminals and changes the state of the output mode GPIO
terminals. Writing to a bit that is in input mode or is enabled for a secondary function is ignored. The secondary
functions share GPIO0 (CLKRUN), GPIO1 (PWR_OVRD), GPIO4 (SCL), and GPIO5 (SDA). The default
value at power up depends on the state of the GPIO terminals as they default to general-purpose inputs. See
Table 4−34 for a complete description of the register contents.
RESET STATE
BIT NUMBER
FIELD NAME
GPIO7_DATA
GPIO6_DATA
GPIO5_DATA
GPIO4_DATA
GPIO3_DATA
GPIO2_DATA
GPIO1_DATA
GPIO0_DATA
PCI register offset:
Register type:
Default value:
RSVD
ACCESS
15
0
RW
RW
RW
RW
RW
RW
RW
RW
R
14
0
Table 4−34. GPIO Data Register Description
Reserved. Returns 00h when read.
GPIO 7 data. This bit reads the state of GPIO7 when in input mode or changes the state of GPIO7
when in output mode.
GPIO 6 data. This bit reads the state of GPIO6 when in input mode or changes the state of GPIO6
when in output mode.
GPIO 5 data. This bit reads the state of GPIO5 when in input mode or changes the state of GPIO5
when in output mode.
GPIO 4 data. This bit reads the state of GPIO4 when in input mode or changes the state of GPIO4
when in output mode.
GPIO 3 data. This bit reads the state of GPIO3 when in input mode or changes the state of GPIO3
when in output mode.
GPIO 2 data. This bit reads the state of GPIO2 when in input mode or changes the state of GPIO2
when in output mode.
GPIO 1 data. This bit reads the state of GPIO1 when in input mode or changes the state of GPIO1
when in output mode.
GPIO 0 data. This bit reads the state of GPIO0 when in input mode or changes the state of GPIO0
when in output mode.
13
0
B6h
Read-only, Read/Write
00XXh
12
0
11
0
10
0
9
0
8
0
DESCRIPTION
7
x
6
x
5
x
April 2007 Revised October 2008
4
x
3
x
2
x
1
x
0
x