XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 29

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

April 2007 Revised October 2008
REFCLK_SEL
REFCLK+
REFCLK−
CLK
CLKOUT0
CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLKOUT6
SIGNAL
GZZ/ZZZ
BALL #
A16
C17
C16
P03
C08
B09
B10
A12
A13
B14
A11
BALL #
ZHC
C14
D07
D09
C10
D11
B14
L03
A08
A09
A11
C11
BALL #
ZHH
C13
C14
D07
D10
A14
B08
A09
B10
B11
A13
L03
Table 2−9. Clock Terminals
TYPE
I/O
DI
DI
O
I
I
CMOS
CELL
TYPE
DIFF
DIFF
PCI
Bus
PCI
Bus
HS
HS
LV
IN
IN
V DD_33
V DD_33
V DD_33
CLAMP
V CCP
V CCP
RAIL
single-ended
EXTERNAL
Capacitor to
Pullup or
pulldown
V SS for
PARTS
resistor
mode
−
−
−
Reference clock select. This
terminal selects the reference
clock input.
0 = 100-MHz differential
1 = 125-MHz single-ended,
Reference clock. REFCLK+ and
REFCLK− comprise the
differential input pair for the
100-MHz system reference
clock. For a single-ended,
125-MHz system reference
clock, use the REFCLK+ input.
Reference clock. REFCLK+ and
REFCLK− comprise the
differential input pair for the
100-MHz system reference
clock. For a single-ended,
125-MHz system reference
clock, attach a capacitor from
REFCLK− to V SS .
PCI clock input. This is the clock
input to the PCI bus core.
PCI clock outputs. These clock
outputs are used to clock the
PCI bus. If the bridge PCI bus
clock outputs are used, then
CLKOUT6 must be connected to
the CLK input.
common reference clock
used.
reference clock used.
DESCRIPTION
SCPS155C
Introduction
19