XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 77

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

4.38 MSI Message Control Register
4.39 MSI Message Lower Address Register
April 2007 Revised October 2008
15:8
31:2
BIT
BIT
6:4
3:1
1:0
7
0
This register controls the sending of MSI messages. See Table 4−21 for a complete description of the register
contents.
This register contains the lower 32 bits of the address that a MSI message writes to when a serial IRQ is
detected. See Table 4−22 for a complete description of the register contents.
RESET STATE
RESET STATE
RESET STATE
BIT NUMBER
BIT NUMBER
BIT NUMBER
FIELD NAME
FIELD NAME
ADDRESS
PCI register offset:
Register type:
Default value:
PCI register offset:
Register type:
Default value:
MM_CAP
MSI_EN
MM_EN
64CAP
RSVD
RSVD
Table 4−22. MSI Message Lower Address Register Description
ACCESS
ACCESS
15
31
15
0
0
0
RW
RW
RW
R
R
R
R
Table 4−21. MSI Message Control Register Description
14
30
14
0
0
0
Reserved. Returns 00h when read.
64-bit message capability. This bit is read-only 1b indicating that the bridge supports 64-bit MSI
message addressing.
Multiple message enable. This bit indicates the number of distinct messages that the bridge is
allowed to generate.
Multiple message capabilities. This field indicates the number of distinct messages that bridge is
capable of generating. This field is read-only 100b indicating that the bridge can signal 1 interrupt
for each IRQ supported on the serial IRQ stream up to a maximum of 16 unique interrupts.
MSI enable. This bit enables MSI interrupt signaling. MSI signaling must be enabled by software
for the bridge to signal that a serial IRQ has been detected.
System specified message address
Reserved. Returns 00b when read.
000 = 1 message (default)
001 = 2 messages
010 = 4 messages
011 = 8 messages
100 = 16 messages
101 = Reserved
110 = Reserved
111 = Reserved
0 = MSI signaling is prohibited (default)
1 = MSI signaling is enabled
13
29
13
0
0
0
62h
Read-only, Read/Write
0088h
64h
Read-only, Read/Write
0000 0000h
12
28
12
0
0
0
27
11
11
0
0
0
10
26
10
0
0
0
25
9
0
0
9
0
24
8
0
0
8
0
DESCRIPTION
DESCRIPTION
23
7
1
0
7
0
22
6
0
0
6
0
21
5
0
0
5
0
Classic PCI Configuration Space
20
4
0
0
4
0
19
3
1
0
3
0
SCPS155C
18
2
0
0
2
0
17
1
0
0
1
0
16
0
0
0
0
0
67