XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 151

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

7.9
7.10
April 2007 Revised October 2008
t c
t wH
t wL
t rise
t fall
t dc
t skew
t su
t pd
t pd
t pd
t pd
t on
t on
t off
t off
t su
t h
PCI Clock Timing Requirements Over Recommended Operating Conditions
PCI Bus Timing Requirements Over Recommended Operating Conditions
Cycle time, CLK
Pulse duration (width), CLK high
Pulse duration (width), CLK low
Slew rate, CLK
CLKOUT6:0 duty cycle
CLKOUT6:0 skew between clock outputs
Setup time, CLKOUT6:0 stable before PRST is deasserted
CLK to shared signal valid propagation delay time
CLK to shared signal valid propagation delay time
CLK to shared signal invalid propagation delay time
CLK to shared signal invalid propagation delay time
Enable time, high-impedance-to-active delay time from CLK
Enable time, high-impedance-to-active delay time from CLK
Disable time, active-to-high-impedance delay time from CLK
Disable time, active-to-high-impedance delay time from CLK
Setup time on shared signals before CLK valid (rising edge)
Hold time on shared signals after CLK valid (rising edge)
Note: The PCI shared signals are AD31:0, C/BE3:0, FRAME, TRDY, IRDY, STOP, IDSEL, DEVSEL,
LOCK, SERIRQ, PAR, PERR, SERR, and CLKRUN.
PARAMETER
PARAMETER
PARAMETER
PARAMETER
C L = 50 pF
C L = 30 pF
C L = 50 pF
C L = 30 pF
C L = 50 pF
C L = 30 pF
C L = 50 pF
C L = 30 pF
CONDITION
TEST
TEST
MIN
MIN
40%
1.5
33 MHZ
33 MHZ
30
11
11
2
2
7
0
MAX
MAX
60%
100
0.5
28
11
1
4
Electrical Characteristics
MIN
MIN
40%
1.5
66 MHZ
66 MHZ
15
6
6
1
1
3
0
SCPS155C
MAX
MAX
60%
100
0.5
30
14
4
6
UNITS
UNITS
UNITS
UNITS
V/ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
141