XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 140

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

Memory-Mapped TI Proprietary Register Space
6.24 Serial IRQ Edge Control Register
† These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
130
BIT
15†
14†
13†
12†
11†
10†
9†
8†
7†
6†
5†
4†
SCPS155C
This register controls the edge mode of each IRQ in the serial IRQ stream. This register is an alias for the serial
IRQ edge control register in the classic PCI configuration space (offset E2h, see Section 4.73). See
Table 6−13 for a complete description of the register contents.
RESET STATE
BIT NUMBER
IRQ15_MODE
IRQ14_MODE
IRQ13_MODE
IRQ12_MODE
IRQ11_MODE
IRQ10_MODE
FIELD NAME
IRQ9_MODE
IRQ8_MODE
IRQ7_MODE
IRQ6_MODE
IRQ5_MODE
IRQ4_MODE
Device control memory window register offset:
Register type:
Default value:
15
ACCESS
0
Table 6−13. Serial IRQ Edge Control Register Description
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
14
0
IRQ 15 edge mode
IRQ 14 edge mode
IRQ 13 edge mode
IRQ 12 edge mode
IRQ 11 edge mode
IRQ 10 edge mode
IRQ 9 edge mode
IRQ 8 edge mode
IRQ 7 edge mode
IRQ 6 edge mode
IRQ 5 edge mode
IRQ 4 edge mode
13
0
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
0 = Edge mode (default)
1 = Level mode
12
0
11
0
10
0
9
0
8
0
4Ah
Read/Write
0000h
DESCRIPTION
7
0
6
0
5
0
April 2007 Revised October 2008
4
0
3
0
2
0
1
0
0
0