XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 87

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

4.57 Serial-Bus Slave Address Register
† These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
April 2007 Revised October 2008
7:1†
BIT
0†
The serial-bus slave address register indicates the slave address of the device being targeted by the serial-bus
cycle. This register also indicates if the cycle is a read or a write cycle. Writing to this register initiates the cycle
on the serial interface. See Table 4−31 for a complete description of the register contents.
RESET STATE
BIT NUMBER
SLAVE_ADDR
FIELD NAME
PCI register offset:
Register type:
Default value:
RW_CMD
ACCESS
Table 4−31. Serial-Bus Slave Address Register Description
7
0
RW
RW
6
0
Serial-bus slave address. This 7-bit field is the slave address for a serial-bus read or write
transaction. The default value for this field is 000 0000b.
Read/write command. This bit determines if the serial-bus cycle is a read or a write cycle.
0 = A single byte write is requested (default)
1 = A single byte read is requested
5
0
B2h
Read/Write
00h
4
0
3
0
2
0
1
0
0
0
DESCRIPTION
Classic PCI Configuration Space
SCPS155C
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