XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 30

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

Introduction
20
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C/BE[3]
C/BE[2]
C/BE[1]
C/BE[0]
DEVSEL
FRAME
GNT5
GNT4
GNT3
GNT2
GNT1
GNT0
INTA
INTB
INTC
INTD
IRDY
SIGNAL
SCPS155C
GZZ/ZZZ
BALL #
M02
M01
P02
P01
N02
N01
K03
K02
K01
H02
H03
D02
C01
C02
B01
A02
B03
A03
C04
B05
A05
B06
A06
D07
C07
B07
A07
H01
D01
B04
G01
A14
C12
A10
A09
A08
R02
U02
G02
L04
L03
L01
J02
J03
L02
F01
C11
T01
T03
BALL #
ZHC
M02
M03
K03
K04
K02
K01
H04
H02
H03
H01
G01
G03
C02
C03
B01
B02
A02
B03
A03
D05
A04
C05
B05
A05
C06
B06
A06
A07
E04
C04
D01
E01
A13
A12
B10
A10
C08
C07
N01
N02
E02
L01
L02
J03
J04
J01
F01
J02
F02
BALL #
Table 2−10. PCI System Terminals
ZHH
G03
G02
M02
M03
K03
K02
K01
H04
H02
H03
H01
F03
C02
C03
B01
B02
A02
B03
A03
C04
C05
B05
A05
B06
C06
A06
D06
A07
F02
C01
B04
E02
F01
C11
D11
C10
B09
C08
C07
N01
N02
E04
L01
L02
L04
J04
J03
J01
J02
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
O
I
CELL
TYPE
PCI
Bus
PCI
Bus
PCI
Bus
PCI
Bus
PCI
Bus
PCI
Bus
PCI
Bus
CLAMP
V CCP
V CCP
V CCP
V CCP
V CCP
V CCP
V CCP
RAIL
EXTERNAL
resistor per
resistor per
resistor per
resistor per
PCI spec
PCI spec
PCI spec
PCI spec
PARTS
Pullup
Pullup
Pullup
Pullup
−
−
−
PCI address data lines
PCI command byte enables
PCI device select
PCI frame
PCI grant outputs. These signals
are used for arbitration when the
PCI bus is the secondary bus and
an external arbiter is not used.
GNT0 is used as the REQ for the
bridge when an external arbiter is
used.
PCI interrupts A−D. These signals
are interrupt inputs to the bridge on
the secondary PCI bus.
PCI initiator ready
April 2007 Revised October 2008
DESCRIPTION