XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 100

• Manufacturer Part Number: XIO2000AI
• Description: PCI Express to PCI Bus Translation Bridge
• Manufacturer: TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]

Classic PCI Configuration Space
4.70 Arbiter Request Mask Register
† These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
90
BIT
7†
6†
5†
4†
3†
2†
1†
0†
SCPS155C
The arbiter request mask register enables and disables support for requests from specific masters on the
secondary bus. The arbiter request mask register also controls if a request input is automatically masked on
an arbiter time-out. See Table 4−44 for a complete description of the register contents.
RESET STATE
BIT NUMBER
ARB_TIMEOUT
FIELD NAME
AUTO_MASK
REQ5_MASK
REQ4_MASK
REQ3_MASK
REQ2_MASK
REQ1_MASK
REQ0_MASK
PCI register offset:
Register type:
Default value:
ACCESS
7
0
Table 4−44. Arbiter Request Mask Register Description
RW
RW
RW
RW
RW
RW
RW
RW
6
0
Arbiter time-out. This bit enables the arbiter time-out feature. The arbiter time-out is defined as
the number of PCI clocks after the PCI bus has gone idle for a device to assert FRAME before
the arbiter assumes the device will not respond.
Automatic request mask. This bit enables automatic request masking when an arbiter time-out
occurs.
Request 5 (REQ5) mask. Setting this bit forces the internal arbiter to ignore requests signal on
request input 5.
Request 4 (REQ4) mask. Setting this bit forces the internal arbiter to ignore requests signal on
request input 4.
Request 3 (REQ3) mask. Setting this bit forces the internal arbiter to ignore requests signal on
request input 3.
Request 2 (REQ2) mask. Setting this bit forces the internal arbiter to ignore requests signal on
request input 2.
Request 1 (REQ1) mask. Setting this bit forces the internal arbiter to ignore requests signal on
request input 1.
Request 0 (REQ0) mask. Setting this bit forces the internal arbiter to ignore requests signal on
request input 0.
5
0
0 = Arbiter time disabled (default)
1 = Arbiter time-out set to 16 PCI clocks
0 = Automatic request masking disabled (default)
1 = Automatic request masking enabled
0 = Use request 5 (default)
1 = Ignore request 5
0 = Use request 4 (default)
1 = Ignore request 4
0 = Use request 3 (default)
1 = Ignore request 3
0 = Use request 2 (default)
1 = Ignore request 2
0 = Use request 1 (default)
1 = Ignore request 1
0 = Use request 0 (default)
1 = Ignore request 0
DDh
Read/Write
00h
4
0
3
0
2
0
1
0
0
0
DESCRIPTION
April 2007 Revised October 2008