HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 75

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Addressing
Mode
Register
indirect with
displacement
Indexed
register indirect
GBR indirect
with
displacement
Indexed GBR
indirect
Instruction
Format
@(disp:4,
Rn)
@(R0, Rn) Effective address is sum of register Rn and
@(disp:8,
GBR)
@(R0,
GBR)
Effective Address Calculation Method
Effective address is register Rn contents with
4-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the
operand size.
R0 contents.
Effective address is register GBR contents
with 8-bit displacement disp added. After
disp is zero-extended, it is multiplied by 1
(byte), 2 (word), or 4 (longword), according
to the operand size.
Effective address is sum of register GBR and
R0 contents.
(zero-extended)
(zero-extended)
1/2/4
GBR
GBR
1/2/4
disp
disp
Rn
R0
R0
Rn
+
+
+
+
+ disp
+ disp
GBR + R0
Rn + R0
GBR
Rn
Rev. 5.00, 09/03, page 29 of 760
1/2/4
1/2/4
Calculation Formula
Byte: Rn + disp
Word: Rn + disp
Longword: Rn + disp
4
Rn + R0
Byte: GBR + disp
Word: GBR + disp
Longword: GBR + disp
GBR + R0
4
2
2