HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 635

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

19.3
Port B is an 8-bit input/output port with the pin configuration shown in figure 19.2. Each pin has
an input pull-up MOS, which is controlled by the port B control register (PBCR) in the PFC.
19.3.1
Table 19.3 summarizes the port B register.
Table 19.3 Port B Register
Notes: This register is located in area 1 of physical space. Therefore, when the cache is on, either
Name
Port B data register
access this register from the P2 area of logical space or else make an appropriate setting
using the MMU so that this register is not cached.
* When address translation by the MMU does not apply, the address in parentheses
Port B
Register Description
should be used.
Port B
Abbreviation
PBDR
Figure 19.2 Port B
PTB7 (input/output) / D31 (input/output)
PTB6 (input/output) / D30 (input/output)
PTB5 (input/output) / D29 (input/output)
PTB4 (input/output) / D28 (input/output)
PTB3 (input/output) / D27 (input/output)
PTB2 (input/output) / D26 (input/output)
PTB1 (input/output) / D25 (input/output)
PTB0 (input/output) / D24 (input/output)
R/W
R/W
Initial Value
H'00
Rev. 5.00, 09/03, page 589 of 760
Address
H'04000122
(H'A4000122) *
Access Size
8