HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 278

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Shadow Space: Areas 0 and 2–6 are decoded by physical addresses A28–A26, which correspond
to areas 000 to 110. Address bits 31–29 are ignored. This means that the range of area 0 addresses,
for example, is H'00000000 to H'03FFFFFF, and its corresponding shadow space is the address
space obtained by adding to it H'20000000 n (n
on-chip I/O space, is H'1C000000 to H'1FFFFFFF. The address space H'1C000000 + H'20000000
reserved, and must not be used.
10.1.6
The SH7709S supports PCMCIA standard interface specifications in physical space areas 5 and 6.
The interfaces supported are basically the “IC memory card interface” and “I/O card interface”
stipulated in JEIDA Specifications Ver. 4.2 (PCMCIA2.1).
Table 10.5 PCMCIA Interface Characteristics
Item
Access
Data bus
Memory type
Memory capacity
I/O space capacity
Other features
Note: * Dynamic bus sizing of the I/O bus width is supported only in little-endian mode.
Rev. 5.00, 09/03, page 232 of 760
n–H'1FFFFFFF + H'20000000
PCMCIA Support
Area 6: H'1A000000
Area 5: H'14000000
Area 5: H'16000000
Area 6: H'18000000
Figure 10.4 PCMCIA Space Allocation
Feature
Random access
8/16 bits
Mask ROM, OTPROM, EPROM, EEPROM, flash memory, SRAM
Maximum 32 Mbytes
Maximum 32 Mbytes
Dynamic bus sizing of I/O bus width *
The PCMCIA interface can be accessed from the address translation
area or non-address translation area.
n (n
0–7) corresponding to the area 7 shadow space is
Common memory/Attribute memory
Common memory/Attribute memory
1–6). The address range for area 7, which is
I/O space
I/O space

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