HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 438

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

12.2
12.2.1
TOCR is an 8-bit readable/writable register that selects whether to use the external TCLK pin as
an external clock or an input capture control usage input pin, or an output pin for the on-chip RTC
output clock. TOCR is initialized to H'00 by a power-on reset or manual reset, but is not initialized
in standby mode.
Bits 7 to 1—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 0—Timer Clock Pin Control (TCOE): Selects use of the timer clock pin (TCLK) as an
external clock output pin or input pin for input capture control for the on-chip timer, or as an
output pin for the on-chip RTC output clock. Since the TCLK pin is multiplexed as the PTH7 pin,
when the pin is used as TCLK, bits PH7MD1 and PH7MD0 in the PHCR register should be set to
00 (the "other function" setting).
Bit 0: TCOE
0
1
12.2.2
TSTR is an 8-bit readable/writable register that selects whether to run or halt the timer counters
(TCNT) for channels 0–2. TSTR is initialized to H'00 by a power-on reset or manual reset, but is
not initialized in standby mode when the input clock selected for the channel is the on-chip RTC
clock (RTCCLK). Only when an external clock (TCLK) or the peripheral clock (P ) is used as the
input clock, it is initialized in standby mode when the multiplication ratio of PLL circuit 1 is
changed or when the MSTP2 bit in STBCR is set to 1.
Rev. 5.00, 09/03, page 392 of 760
Initial value:
Initial value:
TMU Registers
Timer Output Control Register (TOCR)
Timer Start Register (TSTR)
R/W:
R/W:
Bit:
Bit:
Description
Timer clock pin (TCLK) used as external clock input or input capture control
input pin for the on-chip timer
Timer clock pin (TCLK) used as output pin for on-chip RTC output clock
—
—
R
R
7
0
7
0
—
—
R
R
6
0
6
0
—
—
R
R
5
0
5
0
—
—
R
R
4
0
4
0
—
—
R
R
3
0
3
0
STR2
R/W
—
R
2
0
2
0
STR1
R/W
—
R
1
0
1
0
(Initial value)
TCOE
STR0
R/W
R/W
0
0
0
0