HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 192

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Table 6.8
Item
Time for priority
decision and SR
mask bit comparison
Wait time until end
of sequence being
executed by CPU
Time from interrupt
exception handling
(save of SR and PC)
until fetch of first
instruction of
exception handler is
started
Rev. 5.00, 09/03, page 146 of 760
Interrupt Response Time
NMI
0.5
+ 0.5
+ 0.5
X ( 0)
5
Icyc
Icyc
Bcyc
Pcyc
Icyc X ( 0)
IRQ
0.5
+ 1
+ 4.5
Pcyc *
5
Icyc
Number of States
Icyc
Bcyc
4
Icyc X ( 0)
PINT
0.5
+ 3.5
5
Icyc
Icyc
Pcyc
Icyc X ( 0)
Peripheral
Modules
0.5
+ 1.5
Pcyc *
0.5
+ 3
5
Icyc
Icyc
Icyc
Pcyc *
5
Icyc Interrupt exception
6
Notes
handling is kept
waiting until the
executing instruc-
tion ends. If the
number of instruc-
tion execution
states is S *
maximum wait
time is: X = S – 1.
However, if BL is
set to 1 by instru-
ction execution or
by an exception,
interrupt exception
handling is
deferred until
completion of an
instruction that
clears BL to 0. If
the following
instruction masks
interrupt exception
handling, the
handling may be
further deferred.
1
, the

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