HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 300

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Bits 5 to 3—Clock Select Bits (CKS2 to CKS0): Select the clock input to RTCNT. The source
clock is the external bus clock (CKIO). The RTCNT count clock is CKIO divided by the specified
ratio. RTCOR must be set before setting CKS2-CKS0.
Bit 5: CKS2
0
1
Bit 2—Refresh Count Overflow Flag (OVF): Indicates when the number of refresh requests
indicated in the refresh count register (RFCR) exceeds the limit set in the LMTS bit in RTCSR.
Bit 2: OVF
0
1
Note: * Contents do not change when 1 is written to OVF.
Bit 1—Refresh Count Overflow Interrupt Enable (OVIE): Selects whether to suppress
generation of interrupt requests by the OVF bit in RTCSR when OVF is set to 1.
Bit 1: OVIE
0
1
Rev. 5.00, 09/03, page 254 of 760
Bit 4: CKS1
0
1
0
1
Description
RFCR has not exceeded the count limit value set in LMTS
Clearing condition: When 0 is written to OVF
RFCR has exceeded the count limit value set in LMTS
Setting condition: When the RFCR value has exceeded the count limit value
set in LMTS *
Description
Interrupt request by OVF is disabled
Interrupt request by OVF is enabled
Bit 3: CKS0
0
1
0
1
0
1
0
1
Description
Normal external bus clock
Clock input disabled
Bus clock (CKIO)/4
CKIO/16
CKIO/64
CKIO/256
CKIO/1024
CKIO/2048
CKIO/4096
(Initial value)
(Initial value)

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