HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 59

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

FP-208C
FP-208E
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
Number of Pins
BP-240A
U18
U19
R18
T19
T17
R19
U17
R17
R16
P19
P18
P17
P16
N19
N18
N17
N16
M19
M18
M17
M16
L19
L18
L16
Pin Name
RAS3L/PTJ[0]
PTJ[1]
CASL/PTJ[2]
VssQ
CASU/PTJ[3]
VccQ
PTJ[4]
PTJ[5]
DACK0/PTD[5]
DACK1/PTD[7]
PTE[6]
PTE[3]
RAS3U/PTE[2]
PTE[1]
TDO/PTE[0]
BACK
BREQ
WAIT
RESETM
ADTRG/PTH[5]
IOIS16/PTG[7]
ASEMD0/PTG[6]
ASEBRKAK/PTG[5]
PTG[4]/CK102
—
—
I/O
O / I/O
O / I/O
O / I/O
O / I/O
I/O
I/O
O / I/O
O / I/O
I/O
I/O
O / I/O
I/O
O / I/O
O
I
I
I
I
I
I
O/I
I
Description
Lower 32 M / 64 Mbytes address
(SDRAM) RAS / input/output port J
Input/output port J *
Lower 32 M / 64 Mbytes address
(SDRAM) CAS / input/output port J
Input/output power supply (0 V)
Lower 32 Mbytes address
(SDRAM) CAS / input/output port J
Input/output power supply (3.3 V)
Input/output port J
Input/output port J
DMA acknowledge 0 / input/output
port D
DMA acknowledge 1 / input/output
port D
Input/output port E
Input/output port E
Upper 32 Mbytes address
(SDRAM) RAS / input/output port
E
Input/output port E
Test data output / input/output
port E
Bus acknowledge
Bus request
Hardware wait request
Manual reset request
Analog trigger / input port H
IOIS16 (PCMCIA) / input port G
ASE mode *
ASE break acknowledge / input
port G
Input port G / clock output
Rev. 5.00, 09/03, page 13 of 760
4
/ input port G
5